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Chip Scale Review January • February • 2017

[ChipScaleReview.com] How process variables affect variation in voiding on bottom termination components Brook Sandy-Smith Indium Corporation Advances and applications of gold electroplating for wafer-level packaging Therese Souza, Lynne Michaelson Technic Inc. FOWLP: comparison and highlights of the latest technology trends Romain Fraux System Plus Consulting Improving stepper throughput with feed-forward metrology of die placement error Tom Swarbrick, Keith Best Rudolph Technologies, Inc. Evolution of impedance-controlled coaxial test sockets and IM material application By Jiachun Zhou (Frank), Dexian Liu, Nhon Huynh, Kevin DeFord Smiths Connectors, Smiths Group Fan-out packaging: a key enabler for optimal performance in mobile devices Cassandra Melvin, Roger Massey Atotech Deutschland GmbH Surface insulation resistance of no-clean flux residues under various surface mount components Bruno Tolla, Denis Jean, Kyle Loomis, Yanrong Shi Kester 33 40 45 53 59 63 49

CONTENTS

Volume 21, Number 1

The International Magazine for Device and Wafer-level Test,

Assembly, and Packaging Addressing

High-density Interconnection of Microelectronic IC's including

3D packages, MEMS, MOEMS,

RF/Wireless, Optoelectronic and Other

Wafer-fabricated Devices for the 21st Century.

STAFF

Kim Newman Publisher knewman@chipscalereview.com Lawrence Michaels Managing Director/Editor lmichaels@chipscalereview.com Debra Vogler Senior Technical Editor dvogler@chipscalereview.com

CONTRIBUTING EDITORS

Roger H. Grace - MEMS rgrace@rgrace.com Dr. Ephraim Suhir - Reliability suhire@aol.com Steffen Kröhnert - Advanced Packaging Steffen.Kroehnert@nanium.com

EDITORIAL ADVISORS

Dr. Andy Mackie (Chair)

Indium Corporation

Dr. Rolf Aschenbrenner

Fraunhofer Institute

Joseph Fjelstad

Verdant Electronics

Dr. Arun Gowda

GE Global Research

Dr. John Lau

ASM Pacific Technology

Dr. Leon Lin Tingyu

National Center for Advanced Packaging

(NCAP China)

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Chip Scale Review

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Lawrence Michaels lmichaels@chipscalereview.com

Copyright © 2016 Haley Publishing Inc.

Chip Scale Review (ISSN 1526-1344) is a registered trademark of

Haley Publishing Inc. All rights reserved.

Subscriptions in the U.S. are available without charge to qualified individuals in

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Chip Scale Review, (ISSN 1526-1344), is published six times a

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August, September-October and November-December. Periodical

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POSTMASTER: Send address changes to Chip Scale Review

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FEATURE ARTICLES

(continued)

E-Tec Interconnect AG,

Mr. Pablo Rodriguez, Lengnau Switzerland

Phone : +41 32 654 15 5

0, E-mail: p.rodriguez@e-tec.com