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59

Chip Scale Review January • February • 2017

[ChipScaleReview.com]

FOWLP: comparison and highlights of the latest

technology trends

By Romain Fraux

[System Plus Consulting]

This article was originally published in the IWLPC 2016 Conference Proceedings. It has been modified for this publication.

o highlight the last implementations of fan-

out wafer-level packaging (FOWLP), this

work will address technological and cost

reviews with comparison of several actual FOWLPs.

With photos taken from physical analyses, we will

describe and compare the design and manufacturing

c o n s t r u c t i o n o f FOWL P i n t e g r a t e d i n r e c e n t

automotive radar applications from Bosch (Infineon

radar chips with embedded wafer-level BGA [eWLB]

technology) and Continental (NXP radar chips with

redistributed chip packaging [RCP] technology). We

will also discuss the latest introduction of Qualcomm

FOWLP into smartphones and will show why that

company is going to provide more products with

fan-out packages by comparing the cost structure

with fan-in WLP. Finally, the latest evolutions of

package-on-package (PoP) for application processor

and memory are highlighted based on teardown

analyses of the flagship smartphones. Pictures of

packages cross sections from Samsung, Qualcomm

and Apple will be presented, and we will describe

and compare their choices in terms of supply chain

and technologies.

Introduction

FOWLP is currently the fastest-growing advanced

packaging technology, and it will continue growing

towards a $2.4B market by 2020 [1]. Fan-out is gaining

in popularity, and many applications (e.g., telecom, automotive, and medical) are

starting to implement it. As shown in

Figure 1

, 2016 is a turning point for the

FOWLP market since Apple and TSMC changed the game and may create a trend of

acceptance of fan-out packages. The market will actually be split into two types: 1)

The “core” market of fan-out, including single-die applications such as baseband,

power management, RF transceivers, etc. This is the main pool for FOWLP solutions

and will keep growing; 2) The “high-density” market of fan-out, started by Apple

APE, that will include larger I/O count applications such as processors, memories,

etc. This market is more uncertain and will require new integration solutions and

high-performing fan-out packages, but has a very high potential.

Mobile customers have high expectations of miniaturization and higher

integration while keeping costs low. FOWLP has proven its ability to reach these

targets. Its small form factor and low-cost capabilities shown in the first wave

of acceptance, referred to as the “core” market, are now enhanced with high-

integration ability of the new fan-out architectures shown in

Figure 2

.

These

architectures are expected to spread driven by the “high-density” fan-out market.

The main example of wider integration that is available is that of TSMC’s fan-out

package-on-package (PoP) for Apple.

FOWLP for radar applications

A k e y m a r k e t f o r FOWL P s i s

automotive applications—and it is now

widespread. In June 2016, Infineon

announced that it had shipped a total of

20 million radar chips [2]. They were

the first to introduce FOWLP in 2012

for the packaging of radar chips, which

enabled radar systems to become more

affordable. Indeed, traditional radar

systems are mounted in chip-on-board

(COB) using wire bonding to connect

the chip with the substrate, which is not

standard for a surface mount technology

(SMT) assembly line. FOWLP offers

the possibility of using a standard solder

reflow assembly and also features low

transmission losses from chip-to-package

and board [3].

T

Figure 1:

FOWLP activity market forecast [1].

Figure 2:

Volume production roadmap for FOWLP [1].