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Chip Scale Review January • February • 2018



January • February 2018

Volume 22, Number 1

A 300mm wafer and a 510 x 515mm panel

are about to be electroplated for packaging.

Electroplating at the panel scale is no longer a

barrier for form factor adoption in packaging.

Tokyo Electron has partnered with customers

to develop cutting-edge processing equipment,

such as the StratusTM P300 and P500 that can

process the substrates shown to create fine

packaging features at superior uniformities.

Cover photo courtesy of Tokyo Electron.



7 Guest Editorial Trends in test Ira Feldman Feldman Engineering Corp. 5 Fan-out panel-level packaging proceeds apace, regardless of standards Paul Werbaneth Intevac, Inc. Technology Trends 3D IC heterogeneous integration by FOWLP John H. Lau ASM Pacific Technology Ltd. 16 Challenges of ECD panel fan-out in high volume and potential solutions Jon Hander, Demetrius Papapanayiotou, Robert Moon, Arthur Keigler, Michelle Schulberg, Mani Sobhian, Bryce Chen, Tyler Barbera, Cristina Chu TEL Advanced Packaging 9