Chip Scale Review - January February 2020

New Advanced Bonding Technologies LAPLACE “3.5D” Laser Assisted Chip Packaging • vertical connection of chip to die stack (”3.5D”) • 3D horizontal die stacking • omitting TSV-VIA structures • laser reflow for lowest thermal and mechanical stress • compatible with solder, pillars, ACF, sinter paste • supporting heterogeneous integration roadmap by horizontal and vertical bonding of MEMS, ASICs, interposer, heat sinks, electromagnetic shielding, etc. • selective chip repair www.pactech.com sales@pactech.com ISO 9001 IATF 16949 ISO 14001 SB²-WB Wire-Solder-Bonding • reliable laser-soldered wire connections for multifunctional systems and modules • no pressure, vibration or high temperature required • heavy & fine wires: wire bundles, ribbons, optical fibres • wide range of materials: Au, Ag, Cu, Pd, Pt, etc. • flat point-to-point connection • ideal solution for thin, soft and brittle substrates: VCSEL, GaN, glass, MEMS, etc. • easy damaged-free UBM interface

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