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16

Chip Scale Review July • August • 2019

[ChipScaleReview.com]

The battlefields of fan-out packaging

By Favier Shoo, Santosh Kumar

[Yole Développement]

n 2019, all the key outsourced

semiconductor assembly and test

suppliers (OSATS), foundries,

and integrated device manufacturers

(IDMs) have fan-out (FO) packaging

solutions in the market. In a mega-

trends-driven era, fan-out platforms

are viewed increasingly as one of the

top options among leading package

technologies. Inevitably, key players

with different busi ness models are

pe ne t r a t i ng a nd compe t i ng i n t he

same market space with different FO

technologies and strategies. This has

resulted not only in an increasingly

divided market from high-end to low-

end applications of FO packaging, but

also an unavoidable battle of cost vs.

performance trade-off between panel-

level vs. wafer-level processing.

Market perspective on fan-out

packaging

Fan-out packaging market value is

expected to grow at a 19% compound

annual growth rate (CAGR) from 2019-

2024 (

Figure 1

), reaching a market size

of $3.8B. Core FO market confirmed its

stability with substantial new entrants

joining via fan-out panel-level packaging

(FOPLP). Although existing FOWLP

players have a long history of established

qualifications, mid-end devices may be

too costly for FOWLP players [1].

Amkor Portugal (NANIUM, S. A.)

and JCET Group (STATS ChipPAC)

used to have almost 80% of the market

prior to 2016, thanks to their strong start

with embedded wafer-level ball grid

array (eWLB) FOWLP. Furthermore,

with a strong track record of FOWLP

production maturity and time-to-market,

FOWLP technology ha s proven it s

quality and gained trust from customers.

The situation changed drastically with

the entrance of TSMC with integrated

fan-out (InFO), which attained more

than 50% of the market in 2017, thanks

to Apple A10, A11 and A12 packaging.

These products have become the high-

end benchmark of FOWLP technology.

Fan-out success and growth are well-

confirmed in the “core” standard FO market

and made possible in the high-density FO

(HDFO) market as well. Consequently,

numerous other FO providers are trying

to enter the game and the competitive

landscape is changing (

Figure 2

).

For core FO, the cu r rent FOWLP

inst alled base is enough to sust ain

existing demand. There was no significant

expansion for existing end-products in

2018, while fabless continued to push

packaging houses for mid-end to high-

end applications at a lowered cost. In core

FO, existing players are expected to go

on a cost competition between wafer level

vs. panel level. Especially within OSATS,

the player who can capture the market

share of mid-end applications for mobile

and automotive will lead the way and set

new standards. Panel players have a great

chance to secure mid-end device business

at the lowest cost possible. SEMCO has

proven FOPLP device qualification with

ePLP package-on-package (PoP) [2]. At

the same time, Powertech Technology

Inc. (PTI) has a big ambition to expand

new FOPLP fabs to capture existing

or new business in the market. ASE/

Deca are in preparation for Qualcomm’s

I

Figure 2:

Fan-out packaging progression. SOURCE: [1]

Figure 1:

Fan-out market: business model evolution. SOURCE: [1]