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Chip Scale Review July • August • 2019

[ChipScaleReview.com]

MEMS packaging trends: from LGA to 3D integration

By Stéphane Elisabeth, Audrey Lahrach

[System Plus Consulting]

n t h e l a s t f e w y e a r s ,

microelectromechanical systems

(MEMS) have been widely used in

different segments: consumer, automotive,

industrial, etc. With products such as

inertial, microphones, pressure sensors,

etc., innovation with MEMS has long been

a hallmark in process manufacturing. With

the introduction of heterogeneous systems,

the use of MEMS packaging is expected

to expand significantly in the next few

years. Wafer-level packaging (WLP), 3D

through-silicon or through-glass vias

(TSVs or TGVs), and wafer bonding are

key enablers for heterogeneous integration

in every segment where devices require

small form factor, high-speed operation

and low powe r con sumpt ion. Cost

efficiency is also, of course, critical.

Packaging solutions for MEMS devices

have been well settled over the past few

years. With simple packaging like quad-flat

no-leads (QFN), or land grid array (LGA),

MEMS cost breakdown distribution

gives a low value for this aspect. But

with increasing demands to reduce

both footprint and power consumption,

along with an increase in performance,

packaging is now at a turning point in

order to satisfy the industry.

Three stages or levels of packaging can

be defined. The first level corresponds to

the wafer. Here, several challenges can be

overcome using technologies like capping

or wafer bonding. At this level, several

innovations have been seen over the last

few years that move toward monolithic or

heterogeneous structures. The second level

has helped to achieve these two structures

and it corresponds to the interconnect.

At this level, TSVs, wire bonds, bumps,

and conductive glue have been developed.

The last stage is the final package where

traditional packaging still dominates

the market. As shown in

Figure 1

, in

2018 the packaging market for MEMS

was estimated to be above $3B, and it is

expected to double to $6B in 2022.

The growth will be mainly driven by

the radio-frequency (RF) device market

with the introduction of 5G and mmWave

technolog ies, mostly for consumer

applicat ions. The “core” ma rket is

expected to maintain the use of traditional

packaging, such as LGA and QFN.

But some innovations are currently in

development in fields like automotive and

consumer, which will open the market to

advanced packaging. Indeed, in the next

few years, embedded die in laminate or

fan-out wafer-level packaging (FOWLP)

are expected to grow.

Packaging technologies: from

standard to WLP

I n t he f ield of MEMS, t he most

common packaging t ypes are LGA,

QFN and dual-flat no-leads (DFN), as we

confirmed in [2]. LGA packages use a

printed circuit board (PCB), unlike QFN

and DFN packages that use a lead frame

in the structure. The cost driver of these

packaging types is different. However,

these common types of packages are

evolving toward wafer-level chip-scale

packaging (WLCSP). In some categories,

the package tends to remain at the same

level. In other categories, however,

we observe some manufacturers who

are constantly trying to improve their

products with disruptive changes, such

as with bonding or via technologies. This

shows the potential of WLCSP packaging

leading to 3D integration.

Ba s e d o n t h e l a r g e n u mb e r o f

components analyzed, the market seems

to be dominated by LGA packaging,

at 60% [2]. The other 40% is shared

be t we en QFN/ DFN, sma l l out l i ne

integrated circuit (SOIC) and WLP. At

the field level, this split is not the same.

For automotive applications, where harsh

environmental requirements could apply,

LGA is no longer the main driver and

SOIC packaging dominates the field. In

consumer applications, however, LGA

is the leading type with its simplicity of

integration. Finally, WLP use is mainly

driven today by MEMS. Magnetometers,

with their similarity to an integrated

circuit, have been widely introduced with

WLCSP packaging. Another field is RF

applications where small devices like

filters require the smallest interconnection

with the mainboard in order to reduce

losses. This has brought WLP to a next

level with TSV and CuFlip™.

I

Figure 1:

MEMS packaging activity market forecast [1].