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Chip Scale Review July • August • 2019

[ChipScaleReview.com]

Volume 23, Number 4

The International Magazine for Device and Wafer-level Test,

Assembly, and Packaging Addressing

High-density Interconnection of Microelectronic IC's including

3D packages, MEMS, MOEMS,

RF/Wireless, Optoelectronic and Other

Wafer-fabricated Devices for the 21st Century.

STAFF

Kim Newman Publisher knewman@chipscalereview.com Lawrence Michaels Managing Director/Editor lmichaels@chipscalereview.com Debra Vogler Senior Technical Editor dvogler@chipscalereview.com

CONTRIBUTING EDITORS

Steffen Kröhnert - Advanced Packaging steffen.kroehnert@espat-consulting.com John L. Lau, Ph.D - Advanced Packaging john_lau@unimicron.com Ephraim Suhir, Ph.D - Reliability suhire@aol.com Rao R. Tummala, Ph.D - Advanced Packaging rao.tummala@ece.gatech.edu

EDITORIAL ADVISORS

Andy Mackie, Ph.D

(Chair)

Indium Corporation

Rolf Aschenbrenner, Dipl.-Phys.

Fraunhofer IZM

Joseph Fjelstad

Verdant Electronics

Arun Gowda, Ph.D

GE Global Research

John Lau, Ph.D

ASM Pacific Technology

Leon Lin Tingyu, Ph.D

National Center for Advanced

Packaging (NCAP China)

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Chip Scale Review

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subs@chipscalereview.com

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Lawrence Michaels lmichaels@chipscalereview.com

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Chip Scale Review (ISSN 1526-1344) is a registered trademark of

Haley Publishing Inc. All rights reserved.

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in the electronics industry. In the U.S. subscriptions by first class mail are

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Chip Scale Review, (ISSN 1526-1344), is published six times a

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