Chip Scale Review May • June • 2016[ChipScaleReview.com]
controllers, and sensors. Often passive
components are included. SiP uses a mixed
assembly of technologies including SMT,
wire bond, flip chip and may feature the
using of embedding or redistribution layer
(RDL) in wafer or panel format.
Q: What advantages does your
company offer the SiP market?
: SiP requires high-precision
assembly technology that leverages
Amk o r ’s s t r e n g t h s i n d e s i g n—
e spec i a l l y f o r RF and mm-wave
designs where understanding the
impact of noise on the performance
is critical. A complete SiP solution
is offered with passive components
in the form of integrated passive
devices or embedded components to
provide a small form factor, embedded
and conformal shields, and antenna
design in an external, side-by-side, or
antenna on package/mold solution. We
offer conformal metal shielding and
emphasize its EMC design on copper-
supporting shielding technology with
good adhesion of the shield to EMI/
ground and minimum leakage through
the bottom layer of the substrate.
Amkor highlights its time-to-market
enabling development cycles of less
than six months with rapid production
ramps of millions of units per week. Also
highlighted is cost reduction by the use
of bill-of-material optimization through
co-design and bill of materials (BOM)
purchasing management and scale, as
well as high-yielding assembly.
: To address ongoing trends
within the electronics market, such as
increasingly smaller devices packaged
with higher functionality, ASE is
building its SiP business upon a strong
foundation that leverages established
core strengths and large infrastructure of
IC assembly capabilities with factories
across the world. ASE is the only OSAT
with internal substrate manufacturing,
semiconductor assembly and test, as
well as EMS capabilities. We can offer
customers a complete solution, based on
our system-level design, manufacturing
expertise, and build-of-materials
logistics management supported by our
: STATS ChipPAC
h a s d e v e l o p e d c omp r e h e n s i v e
capabilities, including design, advanced
packaging technologies, high-density
SMT component placement, advanced
molding for complex topographies,
conformal shielding, and system-
level test, for a wide variety of SiP and
modules in multiple market segments.
Various SiP configurations have been
deployed ranging from conventional 2D
modules with multiple active and passive
components, interconnected through flip
chip, wire bonding, and SMT, to more
complex modules such as package-in-
package (PiP), package-on-package (PoP),
2.5D and 3D integrated solutions.
An experienced R&D and engineering
team supports customers faced with
complex SiP integration requirements.
SMT design rules are being advanced
t h r ough r e f i n eme n t s i n p r o c e s s
technologies to enable tighter component-
to-component placement and new material
and molding technologies to enable lower
mold cap profiles and smaller dimensions.
We work with advanced substrate
materials with fine line and space (L/S),
reduced dielectric thickness, and coreless
design to address the reduced form
factor requirements of next-generation
applications, while enabling lower cost.
: SPIL has developed an antenna-
in-package design using an inverted-F
antenna in the molding compound to
provide size reduction, greater antenna
efficiency, the ability to support high-
density components in the package, and
easier customer layout designs. We also
offer a package with a printed antenna in
the substrate or an antenna-on-package
design using a thin sputtered coating layer.
U TA C
: U TA C h a s r e c e n t l y
teamed with AT&S to offer a 3D SiP
collaboration that allows the co-design of
substrate and assembly in an embedded
chip configuration. Components can be
mounted on top of the package with SMT
or flip chip, enabling a 3D structure.
While there are different views of
SiP, there are some common themes.
TechSearch International has developed
the following definition of SiP:
• SiP is a functional system or
s ub s y s t em a s s emb l e d i n t o a
standard footprint package such as
an LGA, BGA, quad flat no lead
(QFN), or FOWLP.
• It contains two or more dissimilar
die, typically combined with other
components such as passives,
filters, MEMS, sensors, and/or
• The components are mounted
together on a substrate to create
a customized, highly integrated
product for a given application.
Regardless of the definition used, SiP
is driven by the need for miniaturization
and is only adopted when form factor and
performance requirements are met.
A common theme that runs through
the OSATs is the importance of design
in the SiP process. Die and package
traditionally have been treated as
two separate designs. The package
engineering is considered a backend
effort. With SiP, co-design is essential
for success, which becomes especially
impo r t an t i n t he examp l e o f RF
products where antenna design and
EMI shielding are required. In many
cases, reducing the cost of SiP depends
on reducing the BOM, which can be
accomplished with careful design.
Success in SiP will require a business
model that combines the strengths of
the electronics manufacturing services
(EMS) providers with those of the
semiconductor assembly and test
providers. For this reason, additional
partnerships are expected to emerge.
As noted by STATS ChipPAC, existing
package technologies and processes are
used to enable various SiP solutions.
The challenge is the integration of these
processes, and the incorporation of
new process technologies such as EMI
shielding, and yield management.
About TechSearch International,
I nc . : The company – f ounded i n
1987 – is a market research leader
specializing in technology trends
i n m i c ro e l e c t ro n i c s p a c k a g i n g