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50

Chip Scale Review May • June • 2019

[ChipScaleReview.com]

to the water aerosol used during cleaving) is

applied to the laser influence zone. This water

aerosol cools and removes the particles during

their formation. In

Figure 2

, two examples

of a dicing street after scribing and cleaving

are shown: one without, and one with, clean

scribe technology. As shown in

Figure 2

,

clean scribe removed virtually all particles

from the dicing street.

As demonstrated, TLS with the clean

scribe technology is ideal to cut SiC wafers

with thicknesses from 100µm to 550µm with

one scribing path and one cleaving path with

higher feed rates and higher edge quality

compared to other dicing technologies [5].

In order to test the compatibility of the TLS

process with the standard assembly workflow,

fully-processed SiC wafers were diced using

TLS. After dicing, the wafers were inspected

and assembled at a standard production line in

an assembly fab.

These assembled devices were electrically

analyzed for forward blocking characteristics

as well as electrically/thermally stressed using

a high-temperature reverse bias (HTRB)

test (

Figure 3

). All electrical test results

met specifications, proving good electrical

performance of the TLS-diced chips. In

addition to the electrical measurements,

cross section analyses of the die attach were

performed in order to prove the correct die

attach on the lead frame [6].

These results demonstrate that the

electrical properties of the SiC diodes are not

affected by the TLS process and it is possible

to handle the zero kerf devices on the wafers

for shipping and packaging in a high-volume

backend facility.

TLS with deep scribe for silicon

devices

In order to improve the straightness and

the bending strength of separated chips from

silicon wafers, deep scribe technology was

used. Deep scribe is a laser-induced sub-

surface material modification. A pulsed

laser beam of near-infrared wavelength is

focused with an objective into the silicon,

which is partly transparent at 1064nm. Due

to the refractive index, an extension of focal

length and spherical aberrations will occur.

Therefore, an optical system with a high

numerical aperture and a capability to correct

these spherical aberrations is used. The

incident rays propagate through the silicon

until the absorption increases abruptly when

reaching the threshold fluence near the focal

point. This increase in absorption results

from the presence of free charge carriers and

causes an increase in the temperature, which

also causes lattice absorption to take place.

Due to the heat conduction, a club-shaped

material modification along the caustic of the

laser beam will be created (

Figure 4

).

Compared to processes like stealth dicing,

using the deep scribe technique modifies

the material in only a very limited region.

By adjusting parameters such as focus

position, duration of laser pulse and laser

power, an adjustment of the position and

size of the modified area can be achieved.

In combination with cleave, one single deep

scribe layer is sufficient to separate a wafer

up to 775μm in thickness. Nevertheless, a

stacking of two or more deep scribe layers

is also possible in order to provide higher

perpendicularity at the edges of the separated

chips (

Figure 5

).

If max imum bend i ng st reng t h is

required, placing the deep scribe layer in the

middle of the chip side wall will minimize

the introduction of tensile stress to the

modification layer during the bending test.

To determine the bending strength of the

separated dies, 200µm thick wafers were

cut with deep scribe TLS with layers on

different layer positions. For comparison,

similar wafers were cut with current state-

of-the-art mechanical blade dicing. The chip

size for this experiment was 3.6 x 3.6mm

2

.

Breaking strength measurements were

performed with a three-point bending

test of 100 chips per side (front and back)

for the different dicing technologies. The

evaluation was done by Weibull analysis

distribution, whereby the values for the

Figure 2:

Difference between a) (left) standard surface scribe and b) (right) clean scribe. Structures inside

the dicing street are test structures. The tape was expanded after TLS dicing in order to visualize the kerf. The

scribing depth for both scribes is approx. 20µm.

Figure 3:

Electrical characteristics of TLS diced and fully assembled SiC devices: a) (left) Forward I-V charac-

teristics of 25 random samples of SiC diodes; and b) (right) Reverse current IR during HTRB test (56 TLS-diced

SiC diodes and 4 mechanical diced SiC diodes) [6].

Figure 4:

Principle of deep scribe.