Chip Scale Review May • June • 2019[ChipScaleReview.com]
cr it ical applicat ions have requ i red
the development of new sensors and
techniques, including: high-speed laser
triangulation for whole-wafer bump
height metrology and advanced white
light and infrared interferometry for
measurements of film thickness, optical
profiling, substrate metrology, and via
and car rier trench depth metrology.
Additionally, there are new non-visual
defect s t hat t r ad it ional i nspect ion
technologies have not been able to
detect. These defects may be invisible
cracks or residues that may not be caught
during electrical test but cause reliability
issues downstream. In this case, the
development of laser-based contrast
inspection has provided much needed
defect detection capability.
TSVs are used to make connection
between vertically-stacked die by creating a
hole through the silicon substrate and filling
it with metal. There are several types of
TSVs, and many different process sequences
used to form them, such as:
• TSV reveal height: The TSV reveal step
is an etch process that removes the last
bit of silicon after the bulk is removed by
backside grinding. It “reveals” the TSV,
leaving the metal fill protruding slightly
above the surrounding silicon surface.
The height of the protrusion is critical.
• A v i s u a l t h i ck ne s s a nd s h ap e
sensor (VTSS) provides accurate
measurements of reveal height needed
to control the process.
Illustrates the TSV reveal step. The
full wafer plot shows height variations
across the wafer and the histogram
shows the frequency distribution of
• Recess: After reveal, the wafer surface
and protruding TSVs are covered
with an oxide layer and the oxide is
planarized with chemical mechanical
polishing (CMP), leaving a flat surface
with exposed TSVs. It is important to
avoid excessive dishing of the TSVs,
which erode faster than the surrounding
oxide during CMP. The VTSS sensor
can accurately measure the depth of
the recess and the thickness of the
process step and compares a VTSS
measurement to a cross-section image
acquired with an electron microscope
showing close correlation.
• O t h e r T SV i n s p e c t i o n s a n d
measurements include bright-field
scans for surface defects (scratches,
met al re sidue s, and pa r t icle s),
dark-field scans for TSV defects,
and VTSS measurements of pad
height and tetraethyl orthosilicate
RDLs allow signals from a location on
the die surface to be routed to a different
location in WLP and FOWLP packages.
They are typically formed by plating
copper through a patterned photoresist
mask, then isolated by an organic polymer
(polyimide [PI] or benzocyclobutane
[BCB]). Organic contaminants on metal
pads can cause reliability problems that
are often not apparent until a device fails
in the field due to a partial connection
or repeated cycling. These defects are
difficult to detect with conventional
optical inspection systems because they
“disappear” in the noise generated by the
background material. To uncover these
defects, Rudolph developed Clearfind
(CF) technology. CF technology is a
combination of illumination, optics and
image processing capabilities specifically
designed to enhance contrast differences
between metal and organic materials.
When using CF technology, imaged
metals are dark and organics are bright,
eliminating the background noise.
• Shorts/opens/distortions: As shown
, the enhanced contrast
provided by CF images facilitates
TSV Cu reveal step: a) (left) TSV reveal height, b) (middle) full wafer plot of reveal height, and c) (right)
histogram of individual measurements.
After TSV process step and data: a) (left) TSV oxide CMP, b) (middle) VTSS measurement of TSV
recess, and c) (right) cross-sectional electron microscope image of the TSV recess.
a) (left) CF image of organic (bright) and metallic (dark) contaminants; b) (right upper) CF image RDL
line distortion; and c) (right lower) CF image of metal residue.