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Chip Scale Review November • December • 2016


Rama Alapati received his BS degree

in Chemical Technology from Osmania

U., Hyderabad, India, and a Master’s in

Chemical Engineering from the U. of

Kansas, Lawrence, and is VP, Strategic

Development, at Amkor Technology, Inc.

Mike Kelly received his Master ’s

degrees in Mechanical and Chemical

En g i n e e r i n g a n d i s S r. D i r e c t o r,

Advanc ed Pa ckage & Te chno l ogy

Integration, at Amkor Technology, Inc.

Table 1

shows a quick high-level summary

of several high-level design considerations.

There are more criteria depending on the

application and specific customer constraints,

such as improved system performance, or

high performance at relatively low energy

dissipation as measured by bandwidth

per unit of energy expended, thermal

performance, or others.

TSV solutions

With TSVs commonly accepted as a

solution for advanced IC packaging and

several TVS processes available, today’s

design decisions focus on identifying

the right implementation for specific

applications. To make the correct choice,

there are several design considerations and

tradeoffs. Today’s 2.5D TSV solutions enable

new power and form factor efficient systems.

As a result, many leading original equipment

manufacturers (OEM) of semiconductors

have taken advantage of their flexibility

and ability to achieve performance and

cost goals. While 2.5D technology has

matured, significant effort is underway to

scale the technology to enable faster and

more efficient systems. At the same time,

much of the effort for 2.5D is applicable to

3D packages that will provide even further

performance and system advantages. With

these and other process variations, different

customers have the flexibility to choose the

process that meets their specific needs.


Paul Silvestri received his BS degree

in Electrical Engineering from Florida

Atlantic U. and is Director, TSV Product

Development, at Amkor Technology,

Inc.; email

Table 1:

TSV processes and attributes comparison.

R&D Altanova 3601 So. Clinton Ave. South Plainfield, NJ 07080


5.309 mil

1.012 mil

High Aspect Ratio Load

Board Drilling & Plating

• 0.4mm pitch

• 4.75mm thick

• 37:1 Aspect Ratio

• 1 mil plating



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