Chip Scale Review - November December 2019

24 Chip Scale Review November • December • 2019 [] Maskless exposure method evaluation In addition to standard lithographic patterning for black resist evaluation, a novel maskless exposure technology was also used. This maskless dynamic patterning technology shows significant a dva n t age i n t e r ms of pa t t e r n i ng flexibility. It is equipped with a multi- wavelength light source; exposure can thereby be precisely adjusted according to the resist absorption spectrum. Maskless flexibility allows quick design adaptations in any arbitrary shape to the application requirements, and therefore shortens development time of new devices. The same patterning performance is also achieved regardless of pattern shape or pattern density on the wafer layout. Numerous designs applicable for various photonic devices have been tested and evaluated. Examples of the patterned results are presented in Figure 10 . Development method On account of the aforementioned cha r a c t e r i s t ic s of t he bla ck r e si s t ma t e r i a l , t h e r e s i s t t u r n s o u t t o b e s e n s i t i ve a f t e r e x p o s u r e , a n d consequently, the development step is challenging in order to obtain sharp, well-resolved patterns. Conclusively, the development process requires precise parameter setup and becomes as crucial as the coating and exposure process setup, with the aim to control sidewall s h a r p n e s s a n d u nd e r c u t , wh i l e a l s o a v o i d i n g del am i n a t ion of the material from the glass surface. A c o mb i n a t i o n o f p u d d l e , r i n s e a nd s p r ay development was used by employing t h e E V G 1 0 0 series in order to a ch ieve op t ima l resolution results a c compa n ied by s h a r p p a t t e r n edges and avoiding delami nat ion or r e sist of f- peel i ng effects. The key factor is to control the combination, overlap and timing of the development methods resulting in the need for precise process control and overall process stability. Summary Th is joi nt col labor at ion enabled optimized black resist processing and high-resolution lithographic patterning for advanced photonic devices. Results are presented for current and future photonic applications. Finally, the black material fulfills shielding properties with optical density values up to 6/2µm layer thickness and with the transmittance of 2% and less for a visible light with wave l e ng t h o f 4 0 0 nm t o 70 0 nm . Patterning of this highly light absorbing material is ideally suited for photonic shielding applications while enhancing color filter contrast, minimizing defects, and eliminating the need for Cr-based materials. Ultimately, processing of the black material can be performed at the wafer level, thereby enhancing production cost factors for a wide range of photonic industry applications. Acknowledgements This article was written in collaboration with Matthias Br unnbauer, Johanna Rimböck, Martin Eibelhuber and Yutaro Tetsumi. We thank them for their efforts, which greatly improved the manuscript. This article is based on a paper that was presented at the 2019 International Wafer- Level Packaging Conference. References 1. Y. Maruyama, Patent Application EP2466341A1. 2. J . J . L i c a r i , D. W. Swa n s o n , Adhesives Technology for Electronic Applications (2011), p. 261–265 (Chap.: “Applications”). 3. J. Sarkar, Sputtering Materials for VLSI and Thin Film Devices (2014), pp. 49–50 (Chap: 1.4 “Sputtering m a t e r i a l s f o r l i q u i d c r y s t a l displays”). Biographies Bozena Matuskova is Business Development Manager at EV Group, St. Florien, Austria. She holds a Master of Engineering degree in Microelectronics from the Slovak U. of Technology. Email Yoshinori Taguchi is Color Material R&D/Business Manager at Fujifilm Electronic Materials, Yokohama, Japan. He received his Master’s degree in Organic Chemistry from Kyoto U. Figure 9: A spray-coated cavity with black resist. Figure 10: Black resist lithographic patterning and shielding application examples.