Previous Page  23 / 52 Next Page
Information
Show Menu
Previous Page 23 / 52 Next Page
Page Background

21

Chip Scale Review September • October • 2017

[ChipScaleReview.com]

Interferometry for advanced packaging metrology

applications

By Julia Brueckner

[Quantum Analytics]

he dramatically increasing

cost per mm

2

in the front end

combined with the need for

higher I/O counts have caused the wafer-

level packaging industry to experience

tremendous development. The exponential

growth in customer demand for complex

and high-density devices drives the need

for new packaging solutions because

further die shrinking is complicated

and expensive. These solutions enable

increased functionality and offer higher

levels of integration while continuing to

reduce package size. The diverse market

environment employs a large range of new

integrated circuit (IC) packaging types to

meet specific applications, i.e., integration

of memory, accelerated processing unit

(APU), modem and analog – all packed

into one thin package [1].

However, there is a corresponding need

to implement innovative control processes

[2]. This is due to the need to meet the

quality and throughput expectations of

the market while ensuring every known

good die from the final customer ends

up in a well working package. The gains

in packaging process control provide

assu rance t hat t he i nterconnect ion

from the IC to the circuit board is good.

Moreover, this improved process control

helps ensure the desired heat dissipation,

mechanical/environmental protection,

and the device’s long-term reliability and

performance specifications are met. An

accurate and near real-time metrology

loop becomes essential. In this case,

process control is based on optical, non-

contact, nondestructive, high-throughput

interferometry technologies. Spectral

coherence interferometry (SCI) is utilized

to measure film thickness, as well total

thickness variation (TTV) and warpage

[3,4]. White light interferometry (WLI)

measurements provide 3D topography

information, including step heights, critical

dimensions (CD) and roughness [5]. Those

measurements are not straight forward

and require nonstandard sensors due to

the large amount of height variation and

material properties that come along with

epoxy mold compound (EMC) processing

in wafer-level packaging.

Most wafer-level packaging approaches

(especially the fan-out types) require

EMC. This can either be in the form of

a full wafer coating in fan-in processes,

wh ich p r ov ide g r e at cos t benef it s

in embedded wafer-level chip-scale

packaging (WLCSP). Additionally, it can

be in the form of a reconstituted wafer,

e.g., embedded wafer-level ball grid array

(eWLB) technology [6]. The latter has

a number of advantages, including the

realization of ICs with a high number of

interconnects while maintaining excellent

electrical and thermal properties all on

a small silicon acreage. In general, fan-

out wafer-level packaging (FOWLP)

offers an efficient solution providing

high I/O count, a thin package with short

development times and good yield rates

for a WLP because it only uses known

good dies. However, the visual inspection

is restricted and reconstituted wafers

can reveal a high number of surface

irregularities and height deviations. The

mold material creates many challenges

for the process control loop due to its low

reflectivity and strong internal scattering.

Conventional optical thickness metrology

methods fail to deliver data. Therefore,

what is used today are contact-based

approaches (not permitted for product

wafers), or are not accurate enough on

warped wafers (such as back-pressure

probes). Other techniques require the

destruction (cross cut) of the wafer, such

as scanning electron microscopy (SEM).

In the first part of this article, we will

explore how an SCI-based sensor with

a high numerical aperture is utilized

t o mea su re laye r s and su r fa ce s of

mold materials despite measurement

const raints: high roughness values,

high inter nal scattering, and severe

wafer warpage. Different strategies are

demonstrated using specifically designed

sensors to investigate this challenging

molding material on the same metrology

platform. By combining different sensors

into the same module, it is possible to

monitor not only the thickness of several

layers, but also the total thickness, TTV

and surface warpage simultaneously.

Spectral coherence interferometry (SCI)

Wa f e r- l e ve l EMC d e p o s i t i on i s

hard to control and can lead to a very

inhomogeneous thickness distribution

across the wafer. The high variation

of t he su r fa ce st r uct u re and laye r

t h ick ne s s empha si z e t he ne ed fo r

a n a c c u r a t e p r o c e s s i n s p e c t i o n

met rology. If the sample looks like

the left illustration of

Figure 1

, the

results of the measurements are easy

T

Figure 1:

Sketch of sample composition. The two images represent the sample conditions at two different

locations. This huge mold thickness variation on structures at different locations (compare

Figure 1a

(left) vs.

1b

(right) mold thickness distribution) makes optical inspection very challenging.