Previous Page  40 / 52 Next Page
Information
Show Menu
Previous Page 40 / 52 Next Page
Page Background

38

Chip Scale Review September • October • 2018

[ChipScaleReview.com]

Surviving the three phases of high-density advanced

packaging (HDAP) design

By Keith Felton

[Mentor, A Siemens Business]

o s t , r i s k , a n d t h e

limitations of monolithic

scaling are driving growth

of multi-die (heterogeneous) advanced

i nt eg r a t ed c i r cu it ( IC) pa ck ag i ng

s o l u t i o n s , c r e a t i n g o p p o r t u n i t y

throughout the design process. These

h i g h - d e n s i t y a d v a n c e d p a c k a g e s

(HDAP) are d r iving a convergence

of the t raditional IC design and IC

package-design worlds.

Emerging technologies, such as fan-

out wafer-level packaging (FOWLP),

silicon interposers, chip-on-wafer-on-

silicon (CoWoS), and wafer-on-wafer

(WoW) require design teams to work

together to optimize the entire system,

no t j u s t t he i nd i v i du a l e l eme n t s .

These new technologies lead to new

challenges that companies and design

teams must face and overcome. Such

challenges t ypically fall into th ree

cat egor ie s: i nc r e a s ed eng i ne e r i ng

c o s t s , m a n u f a c t u r i n g d e l a y s ,

a nd f u nc t ion a l f a i l u r e of dev ic e s

(

Figure 1

). Su r vival of these th ree

areas requires a process transformation

that t ypically falls into th ree areas

discussed in the sections below.

Va l idat ion and ver i f icat ion.

1)

L a yo u t - v e r s u s - s c h ema t i c ( LVS ) /

layout-versus-layout (LVL) of f inal

2 . 5D/ 3D a s s embly a nd i nd iv idu a l

s u b s t r a t e s ; 2 ) Mu l t i - s u b s t r a t e

electrical extraction and analysis; and

3) Electrical modeling.

M a n u f a c t u r i n g - f o c u s e d

i m p l e m e n t a t i o n .

D a t a b a s e

c a p a c i t y a n d t o o l p e r f o r m a n c e ;

2) Robust, in-tool shape processing

(area fill and planes); and 3) Accuracy

and quality of GDS output.

M u l t i - s u b s t r a t e / d e v i c e s

a r c h i t e c t u r e s .

1) Co n n e c t i v i t y /

interface planning across subst rate

bou nd a r ie s; 2) 2 . 5D/ 3D s t a ck i ng ,

device transforms and scaling; and 3)

Management of heterogeneous data

and formats.

Wh i l e t h e o r d e r of t h e s e t h r e e

may seem backwa rds (i.e., rever se

order), this is typically the order in

which design teams approach HDAP

challenges, i.e., start with extensive

va l id at ion a nd ve r i f icat ion of t he

completed design before it moves to

fabrication and assembly. This initial

approach does not disrupt the current

design process or methodology, but

e n s u r e s t h a t p r ob l ems / i s s u e s a r e

found before manufact u r i ng. Once

this is mastered, take the knowledge

o f wh a t i mp l e me n t a t i o n r e l a t e d

issues are consistently found and put

methodologies, processes and tools in

place to mitigate them. Finally, look at

the architecting and planning process

as par t of a lef t-shif t st rategy that

drives the process with a validated,

optimized concept that will greatly

r e d u c e i mp l eme n t a t i on a nd f i n a l

validation/signoff surprises. The result

will be an optimized and predictable

development schedu le wit hout any

sig n i f ica nt lat e st age eng i ne e r i ng

changes that could be caused by unseen

design issues.

P h a s e 1 : v a l i d a t i o n a n d

verification

HDAP packages typically contain

m u l t i p l e d e v i c e s a n d m u l t i p l e

substrates, often stacked, and typically

d e s i g n e d b y d i s t i n c t l y s e p a r a t e

designers and teams who may, or may

not, interact well.

A c ommo n t h eme a c r o s s t h e s e

pa ckage s is t hey a l l pr e sent some

unique challenge to traditional design

t o o l s a n d me t h o d o l o g i e s . Ma n y

o f t o d a y ’s p a c k a g e s i n c o r p o r a t e

some element of multiple substrates

o r m u l t i p l e d e v i c e s t o d e l i v e r

solutions for system scaling. They

br i ng a number of potent ially new

C

Figure 1:

The three challenge categories of high-density advanced package (HDAP) design.